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[VHDL-FPGA-Verilog] DES加密算法的VHDL实现

Description: DES加密算法的VHDL实现,采用流水线技术
Platform: | Size: 17718704 | Author: rungiw | Hits:

[VHDL-FPGA-Verilog] DES

Description: DES　加密算法的实现，使用硬件描述语言VHDL编写-DES encryption algorithm realization, uses hardware description language VHDL to compile
Platform: | Size: 23552 | Author: zfhustb | Hits:

[VHDL-FPGA-Verilog] tcdg.vhdl

Description: des vhld 源码　程序完成了DES的编码和解码功能-des vhld source procedures completed DES encoding and decoding
Platform: | Size: 5120 | Author: 王亮 | Hits:

[VHDL-FPGA-Verilog] des.tar

Description: 这是一个vhdl的 DES编程软件,希望大家喜欢 -This is a VHDL programming software DES hope you like
Platform: | Size: 37888 | Author: 沈鹏 | Hits:

[Crack Hack] 3des-VHDL

Description: 3des的VHDL实现，适用于quartus环境-3des VHDL applicable to the environment quartus
Platform: | Size: 95232 | Author: xin | Hits:

[Crack Hack] des

Description: DES加密VHDL源代码,包括速度优先与面积优先两种设计-DES encrypted VHDL source code, including the rate of priority and an area of priority two design
Platform: | Size: 3719168 | Author: wlzpudn | Hits:

Description: This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The examp terms of basic logic gates, to more complex systems, such as a behavioural model of a microprocessor and associated memory. All of the examples can be simulated using any synthesised using current synthesis tools. -This file contains a selection of VHDL source files which serve to illustrate the diversity and power of the language when used to describe various types of hardware. The exampterms of basic logic gates, to more complex systems, such as a behavioural model of a microprocessor and associated memory. All of the examples can be simulated using anysynthesised using current synthesis tools.
Platform: | Size: 173056 | Author: gbj | Hits:

[VHDL-FPGA-Verilog] 3des_vhdl

Description: 3重DES（3DES）加密算法的问答及其VHDL实现。-3 re-DES (3DES) encryption algorithm and the Q
Platform: | Size: 140288 | Author: 张开文 | Hits:

[Crack Hack] CODE

Description: DES encryption for verilog program
Platform: | Size: 9216 | Author: socketa | Hits:

[Crack Hack] mos_des

Description: 这是一个用VHDL语言实现了DES加密功能的程序，由于DES加密的模式，解密时需把密要倒置-This is a VHDL language with the DES encryption process, as a result of the mode of DES encryption, decryption is required to close to the inverted
Platform: | Size: 27648 | Author: liyajun | Hits:

[Crack Hack] DES_verilog

Description: this DES made by verilog
Platform: | Size: 15360 | Author: Shawn | Hits:

[Crack Hack] DES_Verilog

Description: 这是我用Verilog写的DES加解密程序,准确的说这是一份实验报告,里面不但有程序还有简单的注释[主要是针对仿真的波形的],我主要写的是主控部分,密钥生成部分参考了下版原康宏的程序.该程序即可加密也可解密,选用CycloneII器件即能跑到100Mhz以上.-This is what I used to write Verilog the DES encryption and decryption procedures, accurate to say that this is a test report, which not only have a simple Notes program [is mainly directed against the waveform simulation], I write is the main control part key generation is partly based on the next version of the original Yasuhiro procedures. The program can also be encrypted can be decrypted, CycloneII optional devices which can run more than 100Mhz.
Platform: | Size: 296960 | Author: jesse | Hits:

[VHDL-FPGA-Verilog] DES101

Description: 数据加密算法（Data Encryption Algorithm，DEA）的数据加密标准（Data Encryption Standard，DES）是规范的描述，它出自 IBM 的研究工作，并在 1997 年被美国政府正式采纳。它很可能是使用最广泛的秘钥系统，特别是在保护金融数据的安全中，最初开发的 DES 是嵌入硬件中的。通常，自动取款机（Automated Teller Machine，ATM）都使用 DES。文件是DES代码的VHDL描述 -Data encryption algorithm (Data Encryption Algorithm, DEA) of the Data Encryption Standard (Data Encryption Standard, DES) is a standardized description of it from IBM s research work and, in 1997, formally adopted by the U.S. government. It is probably the most widely used secret key system, especially in protecting the safety of financial data, the initial development of DES is embedded in hardware. Usually, automated teller machines (Automated Teller Machine, ATM) are the use of DES. Document is described in VHDL code DES
Platform: | Size: 676864 | Author: 陈 | Hits:

[VHDL-FPGA-Verilog] core3DES

Description: Full Des Simulation Code
Platform: | Size: 1887232 | Author: esl | Hits:

[Crack Hack] DES

Description: DES算法的verilog实现，实现了硬件IC对DES的构架，可以直接应用在系统当中。-DES algorithm Verilog realized, the realization of the hardware IC framework of DES, can be directly used in the system.
Platform: | Size: 10240 | Author: 金鑫 | Hits:

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[VHDL-FPGA-Verilog] DES加密算法的VHDL实现

[VHDL-FPGA-Verilog] DES

[VHDL-FPGA-Verilog] tcdg.vhdl

[VHDL-FPGA-Verilog] des.tar

[Crack Hack] 3des-VHDL

[Crack Hack] des

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] 3des_vhdl

[Crack Hack] CODE

[Crack Hack] mos_des

[Crack Hack] DES_verilog

[Crack Hack] DES_Verilog

[VHDL-FPGA-Verilog] DES101

[VHDL-FPGA-Verilog] core3DES

[Crack Hack] DES

[VHDL-FPGA-Verilog] DES

[VHDL-FPGA-Verilog] des

[VHDL-FPGA-Verilog] DES

[VHDL-FPGA-Verilog] des

[VHDL-FPGA-Verilog] des

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